feat: Ported original cape overlay to Linux 6.18.8/DTC 1.7.2
This commit is contained in:
Vincent
94
README.md
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94
README.md
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## Building
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Steps:
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* Clone this repository: https://github.com/beagleboard/BeagleBoard-DeviceTrees
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* Copy the .dtso source file into src/arm/overlays/
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* Run `make -j4 all_arm`
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## Installation
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Steps:
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* Grab the .dtbo file built earlier from src/arm/overlays/
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* Copy it to /lib/firmare
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<br>
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Notice the following options:
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* uboot_overlay_addr4=/lib/firmware/cape-bone-ibb-00A0.dtbo
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* enable_uboot_overlays=1
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* enable_uboot_cape_universal=0
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* cmdline=fsck.repair=yes earlycon coherent_pool=1M net.ifnames=0 lpj=1990656 rng_core.default_quality=100
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These were needed to get it to load correctly.
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<br>
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Disable and/or remove all options and cmdline entries referencing cape manager, universal capes or other capes that are incompatible. You can check if the cape overlay was applied successfully by looking in `/proc/device-tree/chosen/overlays/`. Run `beagle-version` to get any pinmux issue logs.
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<br>
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A minimal working /boot/uEnv.txt (**DO NOT** copy and paste):
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```
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#Docs: http://elinux.org/Beagleboard:U-boot_partitioning_layout_2.0
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uname_r=6.18.8-bone18
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#uuid=
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#dtb=
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###U-Boot Overlays###
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###Documentation: http://elinux.org/Beagleboard:BeagleBoneBlack_Debian#U-Boot_Overlays
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###Master Enable
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enable_uboot_overlays=1
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###
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###Overide capes with eeprom
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#uboot_overlay_addr0=/lib/firmware/cape-bone-ibb-00A0.dtbo
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#uboot_overlay_addr1=<file1>.dtbo
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#uboot_overlay_addr2=<file2>.dtbo
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#uboot_overlay_addr3=<file3>.dtbo
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###
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###Additional custom capes
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uboot_overlay_addr4=/lib/firmware/cape-bone-ibb-00A0.dtbo
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#uboot_overlay_addr4=<file4>.dtbo
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#uboot_overlay_addr5=<file5>.dtbo
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#uboot_overlay_addr6=<file6>.dtbo
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#uboot_overlay_addr7=<file7>.dtbo
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###
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###Custom Cape
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#dtb_overlay=<file8>.dtbo
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###
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###Disable auto loading of virtual capes (emmc/video/wireless/adc)
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#disable_uboot_overlay_emmc=1
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#disable_uboot_overlay_video=1
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#disable_uboot_overlay_audio=1
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#disable_uboot_overlay_wireless=1
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#disable_uboot_overlay_adc=1
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###
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###PRUSS OPTIONS
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###pru_rproc (4.14.x-ti kernel)
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#uboot_overlay_pru=AM335X-PRU-RPROC-4-14-TI-00A0.dtbo
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###pru_rproc (4.19.x-ti kernel)
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#uboot_overlay_pru=AM335X-PRU-RPROC-4-19-TI-00A0.dtbo
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###pru_uio (4.14.x-ti, 4.19.x-ti & mainline/bone kernel)
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uboot_overlay_pru=AM335X-PRU-UIO-00A0.dtbo
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###
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###Cape Universal Enable
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enable_uboot_cape_universal=0
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###
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###Debug: disable uboot autoload of Cape
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#disable_uboot_overlay_addr0=1
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#disable_uboot_overlay_addr1=1
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#disable_uboot_overlay_addr2=1
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#disable_uboot_overlay_addr3=1
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###
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###U-Boot fdt tweaks... (60000 = 384KB)
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#uboot_fdt_buffer=0x60000
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###U-Boot Overlays###
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console=ttyS0,115200n8
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cmdline=fsck.repair=yes earlycon coherent_pool=1M net.ifnames=0 lpj=1990656 rng_core.default_quality=100
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#cape_universal=enable
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#In the event of edid real failures, uncomment this next line:
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#cmdline=fsck.repair=yes earlycon coherent_pool=1M net.ifnames=0 lpj=1990656 rng_core.default_quality=100 video=HDMI-A-1:1024x768@60e
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#Use an overlayfs on top of a read-only root filesystem:
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#cmdline=fsck.repair=yes earlycon coherent_pool=1M net.ifnames=0 lpj=1990656 rng_core.default_quality=100 overlayroot=tmpfs
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##enable Generic eMMC Flasher:
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#cmdline=init=/usr/sbin/init-beagle-flasher
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```
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151
cape-bone-ibb-00A0.dtso
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151
cape-bone-ibb-00A0.dtso
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/*
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* This is the Device Tree overlay for the IBB Home Automation Cape
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* for BeagleBone, BeagleBone Black and Beaglebone Green.
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*
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* Copyright (c) 2015 - Ingenieurbuero Budde
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* Copyright (c) 2026 - Vincent Schweiger <vincent.schweiger@getcom.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/am33xx.h>
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/*
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* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
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*/
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&{/chosen} {
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overlays {
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cape-bone-ibb-00A0.kernel = __TIMESTAMP__;
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};
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};
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/*
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* Free up the pins used by the cape from the pinmux helpers.
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*/
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&ocp {
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P9_24_pinmux { status = "disabled"; }; /* uart1_txd.uart1_txd */
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P9_26_pinmux { status = "disabled"; }; /* uart1_rxd.uart1_rxd */
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P9_21_pinmux { status = "disabled"; }; /* spi0_d0.uart2_txd */
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P9_22_pinmux { status = "disabled"; }; /* spi0_sclk.uart2_rxd */
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P9_11_pinmux { status = "disabled"; }; /* gpmc_wait0.uart4_rxd_mux2 */
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P9_13_pinmux { status = "disabled"; }; /* gpmc_wpn.uart4_txd_mux2 */
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P9_15_pinmux { status = "disabled"; }; /* gpmc_a0.gpio1_16 */
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};
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&am33xx_pinmux {
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bb_uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* P9_24: uart1_txd.uart1_txd */
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* P9_26: uart1_rxd.uart1_rxd */
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>;
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};
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bb_uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* P9_21: spi0_d0.uart2_txd */
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AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE1) /* P9_22: spi0_sclk.uart2_rxd */
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>;
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};
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bb_uart4_pins: pinmux_uart4_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* P9_11: gpmc_wait0.uart4_rxd_mux2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE6) /* P9_13: gpmc_wait0.uart4_txd_mux2 */
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>;
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};
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bb_gpio1_16_pins: pinmux_gpio1_16_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT, MUX_MODE7) /* P9_15: gpmc_a0.gpio1_16 */
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>;
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};
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_uart1_pins>;
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};
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&uart2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_uart2_pins>;
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};
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&uart4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_uart4_pins>;
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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/* shut up DTC warnings */
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#address-cells = <1>;
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#size-cells = <0>;
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rtc@68 {
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compatible = "maxim,ds3231";
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reg = <0x68>;
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};
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/* PCA9546 I2C multiplexer */
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i2cmux@70 {
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compatible = "nxp,pca9546";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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im0: bus@0 {
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compatible = "nxp,pca954x-bus";
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reg = <0>;
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};
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im1: bus@1 {
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compatible = "nxp,pca954x-bus";
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reg = <1>;
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};
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im2: bus@2 {
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compatible = "nxp,pca954x-bus";
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reg = <2>;
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};
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im3: bus@3 {
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compatible = "nxp,pca954x-bus";
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reg = <3>;
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};
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};
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};
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&{/} {
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_gpio1_16_pins>;
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/* avoid stupid warning */
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#address-cells = <1>;
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#size-celss = <0>;
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rtc_mfp@1 {
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label = "rtc_mfp";
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gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
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linux,code = <143>; /* System Wake Up */
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gpio-key,wakeup;
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};
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};
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aliases {
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i2c3 = &im0;
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i2c4 = &im1;
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i2c5 = &im2;
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i2c6 = &im3;
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};
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};
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4174
original/base.dts
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4174
original/base.dts
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File diff suppressed because it is too large
Load Diff
168
original/cape-bone-ibb-00A0.dts
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168
original/cape-bone-ibb-00A0.dts
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@ -0,0 +1,168 @@
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/*
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* This is the Device Tree overlay for the IBB Home Automation Cape
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* for BeagleBone, BeagleBone Black and Beaglebone Green.
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*
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* Copyright (c) 2015 - Ingenieurbuero Budde (http://ing-budde.de)
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/board/am335x-bbw-bbb-base.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/am33xx.h>
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/ {
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compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";
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/* identification */
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part-number = "cape-bone-ibb";
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version = "00A0";
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/* state the resources this cape uses */
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exclusive-use =
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/* the pin header uses */
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"P9.24", /* uart1_txd */
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"P9.26", /* uart1_rxd */
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"P9.21", /* uart2_txd */
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"P9.22", /* uart2_rxd */
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"P9.13", /* uart4_txd */
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"P9.11", /* uart4_rxd */
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"P9.15", /* rtc-int */
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/* the hardware ip uses */
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"uart1",
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"uart2",
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"uart4",
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"gpio1_16";
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fragment@0 {
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target = <&am33xx_pinmux>;
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__overlay__ {
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bb_uart1_pins: pinmux_bb_uart1_pins {
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pinctrl-single,pins = <
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BONE_P9_24 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
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BONE_P9_26 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
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>;
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};
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bb_uart2_pins: pinmux_bb_uart2_pins {
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pinctrl-single,pins = <
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BONE_P9_21 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* spi0_d0.uart2_txd */
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BONE_P9_22 (PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_sclk.uart2_rxd */
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>;
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};
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bb_uart4_pins: pinmux_bb_uart4_pins {
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pinctrl-single,pins = <
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BONE_P9_11 (PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd_mux2 */
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BONE_P9_13 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd_mux2 */
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>;
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};
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bb_gpio1_16_pins: pinmux_bb_gpio1_16_pins {
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pinctrl-single,pins = <
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BONE_P9_15 (PIN_INPUT | MUX_MODE7) /* gpmc_a0.gpio1_16 */
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>;
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};
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};
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};
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fragment@1 {
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target = <&uart1>;
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__overlay__ {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_uart1_pins>;
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};
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};
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fragment@2 {
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target = <&uart2>;
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__overlay__ {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_uart2_pins>;
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};
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};
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fragment@3 {
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target = <&uart4>;
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__overlay__ {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_uart4_pins>;
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};
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};
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fragment@4 {
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target = <&i2c2>;
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__overlay__ {
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/* overwrite clock freq */
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clock-frequency = <400000>;
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/* shut up DTC warnings */
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#address-cells = <1>;
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#size-cells = <0>;
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/* RTC */
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rtc@68 {
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compatible = "maxim,ds3231";
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reg = <0x68>;
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};
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/* PCA9546 I2C multiplexer */
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i2cmux@70 {
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compatible = "nxp,pca9546";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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im0: bus@0 {
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compatible = "nxp,pca954x-bus";
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reg = <0>;
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};
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im1: bus@1 {
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compatible = "nxp,pca954x-bus";
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reg = <1>;
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};
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im2: bus@2 {
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compatible = "nxp,pca954x-bus";
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reg = <2>;
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};
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im3: bus@3 {
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compatible = "nxp,pca954x-bus";
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reg = <3>;
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};
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};
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};
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};
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fragment@5 {
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target-path="/";
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__overlay__ {
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&bb_gpio1_16_pins>;
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/* avoid stupid warning */
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#address-cells = <1>;
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#size-cells = <0>;
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rtc_mfp@1 {
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label = "rtc_mfp";
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gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
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linux,code = <143>; /* System Wake Up */
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gpio-key,wakeup;
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};
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};
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aliases {
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i2c3 = &im0;
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i2c4 = &im1;
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i2c5 = &im2;
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i2c6 = &im3;
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};
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};
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};
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};
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